In this post i will be using powerful cypress FX3 CYUSB3014 USB controller board to interface PE1005 Camera module to USB 3.0. This post will overcome the limits imposed by OV7670 in the last post. OV7670 was just a VGA camera. but PE1005 is full HD 1080p 30PFS camera module with really nice features like Auto focus, 10x optical Zoom, F1.8-2.2 Mechanical Shutter. Electronic image stabilizer.
This camera module is from company called Acutelogic HK limited i received this camera from a eevblog forum member a while back.
As Camera sensor have 16bit Data output with VSYNC HSYNC Pixel Clock. Though timing of VSYN and HSYNC is bit odd. I will discuss that later in post. Matching 60 pin connector on PCB is from Panasonic AXT460124
V1.0 Blank PCB is available for Purchase 9,99 EUR free international Shipping, Black Solder mask HASL Finish.
V1.0 PCB has I2C pull up resistors missing so they need to be mounted in at the mosfet itself.
Camera Documentation is not very clear about dimensions of the connector with respect to the mounting holes. Maybe because manufacturer expect a flex cable to be connected rather than whole thing mounted on to a fix PCB. I did some estimation and it turn out to be perfect fit. 1.5M Mounting screws fit camera module perfectly.
I will directly streaming from camera over USB UVC into a standard VLC application. Thankfully camera directly output raw UUV which is already supported by UVC. so there will not processing of data or need for an custom application on PC side.
Camera module at first glance seems quite simple to interface to FX3 GPIF but , it is a little complicated.
There are few issues as marked by the image of the timing diagram blow.
Line output has fix 18x2 byte extra in the begging and >=4x2 bytes variable length tail on each line. Handing extra 18x2 byte is rather simple but managing variable length trail with GPIF turned out to be quite complicated.
Second issue is HSYNC does not actually indicate valid line output. For first and last line it remains active for too long and also for intermediate line as well it does not indicate valid pixel, as described above each line has a 4x2 byte variable length data.
Image blow shows timing diagram you can see HSYNC(HLD) is active even though VSYNC(VLD ) not active and active pixel in each line are variable.
Solution to the problem above was to capture lines rather than frames and in those line capture only a fix amount of data.
With the help of GPIF state machine i keep track of how many bytes has been captured per line , once fix number of bytes are in there , state machine will wait for next line or next frame
State machine filles two ping pong buffer threads. once offer are done CPU gets an interrupt to attach UVC headers. before buffers are sent over to PC.
Image is perfect and auto focus is fast and reliable
All source code , Firmware , PCB hardware is available in my github account